Dr. Renga Prabhu is working as Prof & HOD in the Department of ECE - DBGI. He has 14 + years of Experience. He obtained Bachelor of Engineering Degree in ECE, with distinction from Bharathidasan University in the year 2002. He obtained Master of Technology in VLSI systems from NIT-Tiruchirappalli (formerly REC – Tiruchirappalli) in the year 2006. He obtained Master of Administration with Finance specialization from Madras University in the year 2009. He also obtained Doctorate of philosophy in VLSI – DSP specialization from Anna University during 2015. He is having rich experience in teaching and research. He is sought knowledge in troubleshooting and servicing. He is also providing counselling to students. He has guided 30+ UG projects and 20+ PG projects. He is having knowledge on working with VLSI-ASIC tools such as Cadence, Mentor Graphics and Synopsys & FPGA tools such as Xilinx ISE, Orcard Pspice and Altera Quartus. He is having working experience with Verliog, VHDL, C, Matlab and System C languages. He is also having domain knowledge on AHB, APB, SPL, SDIO, DigRF, USB 2.0 and DFT technologies.

Academic and Co-curricular Responsibilities :
Dr. R P is the Head of the Department of ECE and he leads the department towards the success of providing a Quality Education to the Society through the Vision and Mission of the College.

Courses Handled :
He has handled both UG &PG Course subjects such as Digital Electronics, Signals & Systems, Micro Processor, Micro Controller. Circuit Theory, VLSI design, Analog VLSI and VLSI testing.,

Additional Responsibilities as per NAAC or NBA :
NAAC Coordinator , NBA Coordinator

Paper Publications, Presentations, Seminars, Conferences & Workshops attended :
• Rengaprabhu, P, Venkatasubramanian, A & Seetharaman, G 2014, ‘FPGA and ASIC Implementation of CORDIC using wave-pipelined circuits’, research article in the Advanced Science Letters, vol. 20, no. 10-12, pp. 2234-2238.
• Venkatasubramanian, A, Rengaprabhu, P & Seetharaman, G 2014, ‘Implementation of one level and two level 2D-DWT using ASIC’, research article in the Advanced Science Letters, vol. 20, no. 10-12, pp. 2239-2243.
• Joseph, S & Rengaprabhu, P 2012, ‘VLSI Realization of a Secure Cryptosystem and Steganography in Image Encryption and Decryption’, proceedings of International Journal of Communications and Engineering, ISSN NO 0988-0382E, volume 02 – no.2
• Annapoorani, R & Rengaprabhu, P 2012, ‘Hardware Accelerated Simulation For Equivalent Image Detection Using Xilinx System Generator’, proceedings of International Journal of Communications and Engineering, ISSN NO 0988-0382E, volume 06 – no.2.
• Rengaprabhu, P, Sivarajan, N, Keerthana, B & Seetharaman, G 2015, ‘Twiddle factor angle generation using modified CORDIC for DSP applications’, proceeding of International Journal of Engineering Research & Technology, pp 94-98.
• Soumya S Kenganal & Rengaprabhu, P 2016, ‘Real time Health Care Monitoring System using Android Mobile’, proceedings of International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, ISSN NO 2278-8875 (Online), ISSN NO 2320-3765 (Print), volume 05, issue 05, pp 4050-4057.
• Rengaprabhu, P, Venkatasubramanian, A, Parasuraman, S, Marimuthu, M & Seetharaman, G 2011, ‘Design and Implementation of SOC and BIST based Wave-Pipelined Circuit’, proceedings of the International Conference on Embedded Systems and Applications, pp. 200-206.
• Venkatasubramanian, A, Rengaprabhu, P & Seetharaman, G 2011, ‘System on Chip Implementation of wave-pipelined 2D DWT’, proceedings of the International Conference on Embedded Systems and Applications, pp. 207-213.
• Rengaprabhu, P, Venkatasubramanian, A & Seetharaman, G 2012, ‘Design and Implementation of Automated Wave-Pipelined Circuit using ASIC’, proceedings of the third IEEE International Conference on Intelligent Systems Modelling and Simulation, pp. 351-355.
• Venkatasubramanian, A, Rengaprabhu, P & Seetharaman, G 2012, ‘Implementation of Hybrid Wave-pipelined 2D DWT Using ASIC’, proceedings of the third IEEE International Conference on Intelligent Systems Modelling and Simulation, pp. 368-373.
• Rengaprabhu, P & Keerthana, B 2012, ‘Design and ASIC Implementation of FIR filter using DA Multiplier, proceeding of National Conferences on Emerging Trends in Engineering & Management’, held at MCE, Chennai.
• Venkatasubramanian, A, Rengaprabhu, P & Seetharaman, G 2013, ‘ASIC Implementation of One level 2D-DWT using Wave-Pipelining’, proceedings of Seventh IEEE Asia Modelling Symposium, pp. 172-175.
• Sivaranjani, V & Rengaprabhu, P 2015, ‘Implementation of High speed decoder architecture of OFDM application’, proceedings of the International Conference on Communication, Circuits & Computer.
• Prabukhanth, T & Rengaprabhu, P 2015, ‘Design and Implementation of efficient transceiver architecture for SDR using FPGA’, proceedings of the International Conference on Innovative research in Electrical sciences (ICAESM 2015). ISBN NO 978-93-84893-25-5.
• Prabukhanth, T & Rengaprabhu, P 2015, ‘Design and Implementation of efficient encoder and decoder architecture for SDR using FPGA’, proceedings of the National Conference on Advanced Research in VLSI and Microprocessor / Controller (ARIVAM’15), KIT, Krishnankoil.
• Soumya S Kenganal & Rengaprabhu, P 2016, ‘Real time Wireless Patient Monitoring System based on IoT’, proceedings of the first International Conference on Digital Technologies and Innovation for Science and Society conducted in Bangkok, Thailand.

Research Area :
VLSI & Digital Signal Processing

Achievements :
• Certificate of merit holder for securing second place in Academic Proficiency during 1995-1996 in diploma.
• Secured second place in paper presentation during 2001-2002 in Trichy Engineering College.
• Secured third place in mini project on Thermo-Optics wireless alarm and circuit debugging during 2001-2002 in Trichy Engineering College.
• EEE department in-charge during 2010 – 2011.
• Project Co-ordinator for Post-graduate VLSI Design for the academic year 2011 - 2012.
• Under-graduate Programme Co-ordinator for ECE department for the academic year 2012 – 2013.
• Project Co-ordinator for Under-graduate, department of ECE for the academic year 2014 - 2015.
• Campus Networking (Internet & Intranet) in-charge from 2013 – till date.
• Campus COE web portal in-charge from 2014 – till date. QIC member - Anna University Nodal Centre, Oxford Engineering College, Trichy.
• Acted as Additional Chief Superintendent for TANCET’15 examination conducted by Anna University, Chennai.
• Acted as Anna University Representative for May/June 2015 - Anna University Examinations.